Job Description

Salary: $191,146 - 212,053 per year Requirements:

• We require a bachelors degree in Electrical Engineering, Computer Engineering, or a related science, engineering, or mathematics discipline, together with at least 10 years of relevant experience; alternatively, a masters degree with at least 8 years of relevant experience.
• We require an active U.S. Department of Defense Secret security clearance at the time of hire.
• Our selected candidate must be eligible for a U.S. Government security investigation and access to classified information.
• Due to the nature of our work, U.S. citizenship is required.
• We are looking for 10–15+ years of ASIC/FPGA design experience, with most of that background rooted in RTL design rather than purely backend or physical design work.
• We need proven experience delivering designs through full ASIC tape-out, including timing closure, physical verification, and post-silicon bring-up.
• We value deep familiarity with FinFET process nodes such as 7nm, 5nm, or similar, along with an understanding of how FinFET differs from planar technology.
• We expect experience with commercial foundry flows such as TSMC, GlobalFoundries, Samsung, or comparable providers.
• We need demonstrated expertise in RTL design and microarchitecture definition, bus fabric correctness, clock domain crossing analysis and closure, reset sequencing validation, timing closure at advanced nodes, and power analysis and optimization.
• We are looking for expert-level knowledge of ASIC/FPGA engineering principles, RTL coding practices, and synthesis flows.
• We expect strong familiarity with industry-standard EDA tools for synthesis, simulation, formal verification, and static timing analysis.
• We need a candidate who can operate independently, identify issues, drive resolution, and keep work moving without daily direction.
• We value the ability to evaluate vendor and foundry capabilities to support product decisions.
• We are looking for a track record of inventive technical contributions that shape the approach, not just execute to specification.
• We expect solid understanding of organizational processes, including schedule management and earned value inputs.
• We need proficiency with JIRA for issue tracking and backlog management.
• We expect proficiency with Microsoft Office for documentation and communication.

• We want you to define the ASIC/FPGA technical approach from concept through silicon, including system partitioning, microarchitecture, and interface definition.
• You will lead detailed RTL development with a focus on correctness across bus fabric integrity, CDC, reset sequencing, and design-for-verification.
• You will drive synthesis, place and route, and static timing analysis, and resolve timing problems at advanced process nodes.
• You will serve as the primary verification contact, own test and simulation plans, verify outcomes, and close out failures.
• You will own JIRA triage by reviewing incoming issues, prioritizing work, and keeping the backlog aligned with program needs.
• You will lead RTL code reviews and provide clear, constructive technical feedback to engineers at all levels.
• You will contribute to Integrated Master Schedule development and Earned Value reporting by providing accurate technical status, completion criteria, and schedule risk input.
• You will evaluate high-level design flows through GDSII, including synthesis, P&R, timing, power analysis, and DFT considerations.
• You will assess foundry technologies, device libraries, IP cores, and EDA tools to guide design decisions.
• You will support large proposals and subcontracts, including technical approach development, source selection, statement-of-work creation, and work product acceptance.
• You will mentor junior and mid-level engineers and help improve our ASIC/FPGA design processes.
• You will participate in multi-divisional and multi-company integrated product teams and working groups.

• Backend
• FPGA
• Fabric
• Support
• JIRA
• Security
• Hardware

More:

We are General Dynamics Mission Systems, a global team of more than 12,000 professionals delivering advanced technology solutions, products, and services that help customers succeed across mission domains. We work in the defense and scientific arenas with a culture built on trust, honesty, alignment, and transparency. We offer highly competitive benefits, a flexible work environment, and recognition for contributions, with compensation for this role typically ranging from USD $191,146 to USD $212,053 per year depending on experience and location. This is a hybrid opportunity, and we are proud to be an equal opportunity employer supporting individuals with disabilities and protected veterans.

last updated 33 week of 2026

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